Scott Dickson
VHDL / Verilog / FPGA / ASIC Design Consultant

Design Experience:

ASIC and FPGA Designs from 10K to over five million gates.

Extensive experience in RTL and Behavioral modeling in VHDL and
Verilog.

Verification, including DSP, PCI, Memory, and interface models.

FPGA design with Altera, Xilinx FPGAs, including 10K, Spartan,
VirtexE/II.

VHDL/ASIC /FPGA course instructor and Course development.